1. Field of the Invention
The present invention relates to a memory system, e.g., a memory system including a nonvolatile memory such as a NAND flash memory.
2. Description of the Related Art
Recently, demands for large-capacity nonvolatile semiconductor memories are increasing with the rapid spread of digital cameras, portable audio players, and the like, and NAND flash memories are widely used as such nonvolatile semiconductor memories. In addition, to implement a large-capacity NAND flash memory, a multilevel NAND flash memory that stores data having a plurality of bits in one memory cell transistor has been proposed.
In the NAND flash memory, data is defined by the threshold voltage of a memory cell transistor. Accordingly, a plurality of threshold voltages are used to record multilevel data. Recently, the distance between memory cell transistors has shortened as micropatterning of elements advances. This increases the influence of the capacitance between the floating gate electrodes of adjacent memory cell transistors. More specifically, the threshold voltage of a memory cell transistor fluctuates owing to that of a memory cell transistor which is adjacent to the former memory cell transistor and in which data is to be written later.
In particular, a memory cell transistor used in a multilevel memory has a plurality of threshold values, so the threshold voltage distribution per data must be exceedingly narrowed. Accordingly, the problem that the threshold voltage fluctuates in accordance with data in an adjacent cell becomes significant in a multilevel memory. Furthermore, if the fluctuation in threshold voltage increases, recorded data is shifted one level (data drift occurs), so no high data reliability can be obtained.
As a related technique of this kind, a semiconductor memory data write method capable of improving the data reliability is disclosed (Jpn. Pat. Appln. KOKAI Publication No. 2006-228394).